// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  ring_cfg_c_union_define.h
// Project line  :  ICT
// Department    :  ICT Processor Chipset Development Dep
// Author        :  Huawei
// Version       :  1.0
// Date          :  2017/11/13
// Description   :  The description of HiMINI project
// Others        :  Generated automatically by nManager V4.2 
// History       :  Huawei 2018/03/19 15:43:12 Create file
// ******************************************************************************

#ifndef __RING_CFG_C_UNION_DEFINE_H__
#define __RING_CFG_C_UNION_DEFINE_H__

/* Define the union U_SC_HW_AIC_RESET_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_0            : 30  ; /* [31:2] */
        unsigned int    srst_req_hw_aic1 : 1  ; /* [1] */
        unsigned int    srst_req_hw_aic0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HW_AIC_RESET_REQ;

/* Define the union U_SC_HW_AIC_RESET_DREQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_1             : 30  ; /* [31:2] */
        unsigned int    srst_dreq_hw_aic1 : 1  ; /* [1] */
        unsigned int    srst_dreq_hw_aic0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HW_AIC_RESET_DREQ;

/* Define the union U_SC_MBIST_CTRL_LLC */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_2                : 28  ; /* [31:4] */
        unsigned int    sys_mbist_clken_data : 2  ; /* [3:2] */
        unsigned int    sys_mbist_clken_tag  : 1  ; /* [1] */
        unsigned int    sys_mbist_clkmux     : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MBIST_CTRL_LLC;

/* Define the union U_SC_RING_CLOSED_PORT */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_3        : 17  ; /* [31:15] */
        unsigned int    close_port14 : 1  ; /* [14] */
        unsigned int    close_port13 : 1  ; /* [13] */
        unsigned int    close_port12 : 1  ; /* [12] */
        unsigned int    close_port11 : 1  ; /* [11] */
        unsigned int    close_port10 : 1  ; /* [10] */
        unsigned int    close_port9  : 1  ; /* [9] */
        unsigned int    rsv_4        : 1  ; /* [8] */
        unsigned int    rsv_5        : 1  ; /* [7] */
        unsigned int    close_port6  : 1  ; /* [6] */
        unsigned int    rsv_6        : 1  ; /* [5] */
        unsigned int    rsv_7        : 1  ; /* [4] */
        unsigned int    close_port3  : 1  ; /* [3] */
        unsigned int    close_port2  : 1  ; /* [2] */
        unsigned int    close_port1  : 1  ; /* [1] */
        unsigned int    close_port0  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_RING_CLOSED_PORT;

/* Define the union U_SC_LINKDOWN_REQ */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_8                : 30  ; /* [31:2] */
        unsigned int    linkdown_req_aicore1 : 1  ; /* [1] */
        unsigned int    linkdown_req_aicore0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LINKDOWN_REQ;

/* Define the union U_SC_SD_MODE_CTRL */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_9          : 31  ; /* [31:1] */
        unsigned int    sd_mode_aicore : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SD_MODE_CTRL;

/* Define the union U_SC_MME_CTRL_AICORE */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_10                  : 28  ; /* [31:4] */
        unsigned int    mem_power_mode_sd_smmu1 : 1  ; /* [3] */
        unsigned int    mem_power_mode_sd_aic1  : 1  ; /* [2] */
        unsigned int    mem_power_mode_sd_smmu0 : 1  ; /* [1] */
        unsigned int    mem_power_mode_sd_aic0  : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_MME_CTRL_AICORE;

/* Define the union U_SC_HW_SFC_RESET_ST */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_11          : 30  ; /* [31:2] */
        unsigned int    srst_st_hw_aic1 : 1  ; /* [1] */
        unsigned int    srst_st_hw_aic0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_HW_SFC_RESET_ST;

/* Define the union U_PERI_CFG_VERSION0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    peri_cfg_version0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PERI_CFG_VERSION0;

/* Define the union U_SC_LINKDOWN_ACK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_12               : 30  ; /* [31:2] */
        unsigned int    linkdown_ack_aicore1 : 1  ; /* [1] */
        unsigned int    linkdown_ack_aicore0 : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_LINKDOWN_ACK;

/* Define the union U_PERI_CFG_MAGIC_WORD */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    peri_cfg_magic_word : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_PERI_CFG_MAGIC_WORD;

/* Define the union U_SC_SYSCTRL_LOCK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_lock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSCTRL_LOCK;

/* Define the union U_SC_SYSCTRL_UNLOCK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    sysctrl_unlock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_SYSCTRL_UNLOCK;

/* Define the union U_SC_ECO_RSV0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV0;

/* Define the union U_SC_ECO_RSV1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV1;

/* Define the union U_SC_ECO_RSV2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV2;

/* Define the union U_SC_ECO_RSV3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    eco_rsv3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV3;

/* Define the union U_SC_ECO_RSV4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    prototype_clk : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV4;

/* Define the union U_SC_ECO_RSV5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    prototype_rst_n : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_SC_ECO_RSV5;

/* Define the union U_FPGA_VER */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    fpga_veri_num : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_FPGA_VER;


//==============================================================================
/* Define the global struct */
typedef struct
{
    volatile U_SC_HW_AIC_RESET_REQ  SC_HW_AIC_RESET_REQ  ; /* C00 */
    volatile U_SC_HW_AIC_RESET_DREQ SC_HW_AIC_RESET_DREQ ; /* C04 */
    volatile U_SC_MBIST_CTRL_LLC    SC_MBIST_CTRL_LLC    ; /* 2000 */
    volatile U_SC_RING_CLOSED_PORT  SC_RING_CLOSED_PORT  ; /* 2020 */
    volatile U_SC_LINKDOWN_REQ      SC_LINKDOWN_REQ      ; /* 2100 */
    volatile U_SC_SD_MODE_CTRL      SC_SD_MODE_CTRL      ; /* 2150 */
    volatile U_SC_MME_CTRL_AICORE   SC_MME_CTRL_AICORE   ; /* 3000 */
    volatile U_SC_HW_SFC_RESET_ST   SC_HW_SFC_RESET_ST   ; /* 5C00 */
    volatile U_PERI_CFG_VERSION0    PERI_CFG_VERSION0    ; /* E0A0 */
    volatile U_SC_LINKDOWN_ACK      SC_LINKDOWN_ACK      ; /* E000 */
    volatile U_PERI_CFG_MAGIC_WORD  PERI_CFG_MAGIC_WORD  ; /* E0A4 */
    volatile U_SC_SYSCTRL_LOCK      SC_SYSCTRL_LOCK      ; /* F100 */
    volatile U_SC_SYSCTRL_UNLOCK    SC_SYSCTRL_UNLOCK    ; /* F110 */
    volatile U_SC_ECO_RSV0          SC_ECO_RSV0          ; /* FF00 */
    volatile U_SC_ECO_RSV1          SC_ECO_RSV1          ; /* FF04 */
    volatile U_SC_ECO_RSV2          SC_ECO_RSV2          ; /* FF08 */
    volatile U_SC_ECO_RSV3          SC_ECO_RSV3          ; /* FF0C */
    volatile U_SC_ECO_RSV4          SC_ECO_RSV4          ; /* FF10 */
    volatile U_SC_ECO_RSV5          SC_ECO_RSV5          ; /* FF14 */
    volatile U_FPGA_VER             FPGA_VER             ; /* FFFC */

} S_ring_cfg_REGS_TYPE;

/* Declare the struct pointor of the module ring_cfg */
extern volatile S_ring_cfg_REGS_TYPE *gopring_cfgAllReg;

/* Declare the functions that set the member value */
int iSetSC_HW_AIC_RESET_REQ_srst_req_hw_aic1(unsigned int usrst_req_hw_aic1);
int iSetSC_HW_AIC_RESET_REQ_srst_req_hw_aic0(unsigned int usrst_req_hw_aic0);
int iSetSC_HW_AIC_RESET_DREQ_srst_dreq_hw_aic1(unsigned int usrst_dreq_hw_aic1);
int iSetSC_HW_AIC_RESET_DREQ_srst_dreq_hw_aic0(unsigned int usrst_dreq_hw_aic0);
int iSetSC_MBIST_CTRL_LLC_sys_mbist_clken_data(unsigned int usys_mbist_clken_data);
int iSetSC_MBIST_CTRL_LLC_sys_mbist_clken_tag(unsigned int usys_mbist_clken_tag);
int iSetSC_MBIST_CTRL_LLC_sys_mbist_clkmux(unsigned int usys_mbist_clkmux);
int iSetSC_RING_CLOSED_PORT_close_port14(unsigned int uclose_port14);
int iSetSC_RING_CLOSED_PORT_close_port13(unsigned int uclose_port13);
int iSetSC_RING_CLOSED_PORT_close_port12(unsigned int uclose_port12);
int iSetSC_RING_CLOSED_PORT_close_port11(unsigned int uclose_port11);
int iSetSC_RING_CLOSED_PORT_close_port10(unsigned int uclose_port10);
int iSetSC_RING_CLOSED_PORT_close_port9(unsigned int uclose_port9);
int iSetSC_RING_CLOSED_PORT_close_port6(unsigned int uclose_port6);
int iSetSC_RING_CLOSED_PORT_close_port3(unsigned int uclose_port3);
int iSetSC_RING_CLOSED_PORT_close_port2(unsigned int uclose_port2);
int iSetSC_RING_CLOSED_PORT_close_port1(unsigned int uclose_port1);
int iSetSC_RING_CLOSED_PORT_close_port0(unsigned int uclose_port0);
int iSetSC_LINKDOWN_REQ_linkdown_req_aicore1(unsigned int ulinkdown_req_aicore1);
int iSetSC_LINKDOWN_REQ_linkdown_req_aicore0(unsigned int ulinkdown_req_aicore0);
int iSetSC_SD_MODE_CTRL_sd_mode_aicore(unsigned int usd_mode_aicore);
int iSetSC_MME_CTRL_AICORE_mem_power_mode_sd_smmu1(unsigned int umem_power_mode_sd_smmu1);
int iSetSC_MME_CTRL_AICORE_mem_power_mode_sd_aic1(unsigned int umem_power_mode_sd_aic1);
int iSetSC_MME_CTRL_AICORE_mem_power_mode_sd_smmu0(unsigned int umem_power_mode_sd_smmu0);
int iSetSC_MME_CTRL_AICORE_mem_power_mode_sd_aic0(unsigned int umem_power_mode_sd_aic0);
int iSetSC_HW_SFC_RESET_ST_srst_st_hw_aic1(unsigned int usrst_st_hw_aic1);
int iSetSC_HW_SFC_RESET_ST_srst_st_hw_aic0(unsigned int usrst_st_hw_aic0);
int iSetPERI_CFG_VERSION0_peri_cfg_version0(unsigned int uperi_cfg_version0);
int iSetSC_LINKDOWN_ACK_linkdown_ack_aicore1(unsigned int ulinkdown_ack_aicore1);
int iSetSC_LINKDOWN_ACK_linkdown_ack_aicore0(unsigned int ulinkdown_ack_aicore0);
int iSetPERI_CFG_MAGIC_WORD_peri_cfg_magic_word(unsigned int uperi_cfg_magic_word);
int iSetSC_SYSCTRL_LOCK_sysctrl_lock(unsigned int usysctrl_lock);
int iSetSC_SYSCTRL_UNLOCK_sysctrl_unlock(unsigned int usysctrl_unlock);
int iSetSC_ECO_RSV0_eco_rsv0(unsigned int ueco_rsv0);
int iSetSC_ECO_RSV1_eco_rsv1(unsigned int ueco_rsv1);
int iSetSC_ECO_RSV2_eco_rsv2(unsigned int ueco_rsv2);
int iSetSC_ECO_RSV3_eco_rsv3(unsigned int ueco_rsv3);
int iSetSC_ECO_RSV4_prototype_clk(unsigned int uprototype_clk);
int iSetSC_ECO_RSV5_prototype_rst_n(unsigned int uprototype_rst_n);
int iSetFPGA_VER_fpga_veri_num(unsigned int ufpga_veri_num);

#endif // __RING_CFG_C_UNION_DEFINE_H__
